|Summary |Design Structures |Sequential Statements |Concurrent Statements |Types and Constants |

|Declarations |Delay, Events |Reserved Words |Operators |System Tasks |Compiler Directives |

Verilog Sequential Statements

These behavioral statements are for use in:
initial block, always block, task, function

Sequential Statements

if statement

Conditional execution of sequential statements
 
  if(<condition>)
    begin
      <statements>
    end
 
  Example:
 
  if(a > max && b == 0)
    begin
      max = a;
      b = a-1;
    end
 
  if(<condition1>)
    begin
      <statements>
    end
  else if(<condition2>)
    begin
      <statements>
    end
  //                 any number of optional  "else if" clauses
  else               // optional "else" clause
    begin
      <statements>
    end
 
  Example:
 
  if(a < 5)  // only execute the statements for the first true condition
    begin
      a = a+5;
      b = a/c;
    end
  else if(a < 10)
    begin
      a = a-5;
      c = b/a;
    end
  else if(b != a)
    begin
      b = a;
      c = c/2;
    end
  else
    begin  // execute only if none of the conditions above are true
      b = 0;
      c = 0;
    end
 

case statement

Execute the selected sequential statements
 
  case(<expression>) // or  casex  or  casez  for == accepting x or z
    <expression1> : <statement>
    <expression2> : begin
                      <statements>
                    end
    <expression3>,             // note comma
    <expression4>: <statement> // for both expression==expression3
                               // and expression==expression4
    ...
    default : <statement>      // optional
  endcase

for statement

Iteration statement 
  semantics:  var = initial_expression
              exit loop if condition false (zero)
              execute statements
              var = update_expression
              jump to exit loop test

  for(var=initial_expression ; condition; var=update_expression)
  begin
    <statements>
  end

  Example:

  for(i=1 ; i<=10; i=i+1)
  begin
    A[i] = B[i-1];
    B[i-1] = B[i-1]*2 + i;
  end

repeat statement

  repeat(<count>)  // block of statements repeated <count> times
  begin
    <statements>
  end

while statement

  while(<condition>)  // block of statements repeated while <condition> is true
  begin
    <statements>
  end

forever statement

  forever  // loop forever
  begin
    <statements>
  end

unnamed block statement

  begin         // just an unnamed sequential block
    <statements> // executed sequentially
  end

fork - join statements

  fork
    <statements> // executed in parallel
  join           // wait until all statements finish

  fork
    begin        // block of statements executing in parallel
      <statements>
    end
    begin        // any number of parallel blocks
      <statements>
    end
  join          // wait until all blocks have finished

wait statement

Cause execution of sequential statements to wait.

  wait(<condition>) #(<optional_delay) <statement>
  wait(<condition>)  // waits for condition to become true (non-zero)

event triggered statement

Cause a sequential statement or block to execute when <some_event> occurs

  @(<some_event>) <statement>

  @(<some_event>)
    begin
      <statements>
    end

  Example:

  @(negedge clock) a_out = a-in;

  @(posedge reset)
    begin
      clear_reg = 1;
      running = 0;
    end

delay statement

  "#20;"  // delay 20 time units

disable statement

assign - deassign statements

force - release statements

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